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| Product Name | Product Model | Function Description | Main Technical Specifications |
|---|---|---|---|
| Digitized Miniature Laser Detection Component | BMMM05-00 | Single power supply, automatic gain control, digital real-time SPI output of coordinates, four-quadrant amplitude and other data. It features wide dynamic range, small size and light weight, and can be used in laser semi-active guided weapons with a caliber of 27mm and above. | Pulse signal dynamic range: ≥100dB; Minimum detectable optical power: ≤0.5μW; Operating voltage: 5.5V～6V; Power consumption: ≤1.5W; Volume: ≤Φ25mm×20mm; Weight: ≤25g; Pulse width: 10–200ns |
| Satellite-borne Computer | BMMS10-01 | With BM3109IB as the core component, it is equipped with rich peripheral interfaces. It can be used for on-board task scheduling, data processing and storage, daily work management and other functions. | Dimensions: 96mm×88.4mm×15.0mm; 2-channel IIC communication bus; 2-channel SPI communication; 1-channel CAN bus interface; 2-channel 32G SD storage; 5-channel UART communication (full-duplex RS232 electrical interface); Current-limiting protection function; Average power consumption of the whole board ≤2W; Voltage and current monitoring of on-board power supply; RTC clock function; On-board temperature detection |
| BM3109IB Development Board | BMME01-00 | External switchable +5V voltage input and on-board voltage conversion. On-board programmable system-on-chip with adjustable processor frequency, configurable operating mode and external reset function. It has 300,000-gate programmable logic, 8MB FLASH, 1MB SRAM and 16MB SDRAM memory, and provides dual redundant 1553B channels with transceivers and transformers. | External switchable +5V voltage input and on-board voltage conversion; On-board programmable system-on-chip with adjustable processor frequency, configurable operating mode and external reset function; 300,000-gate programmable logic; 8MB FLASH, 1MB SRAM, 16MB SDRAM memory; Dual redundant 1553B channels with transceivers and transformers |
| BQ5V Series FPGA Application Development Board | — | The BQ5V series application development board is a hardware platform designed for the use of BQ5V series FPGAs, which can support the application and development of multiple BQ5V series FPGAs. The development board is mainly divided into power supply system, configuration system, BQ5V series FPGA system, dynamic refresh system and data interface system. The data interfaces include DDR2 data storage, 10/100/1000Mb/s Ethernet MAC, SFP optical fiber communication interface, SATA interface, RS232 interface, RS485 interface, GTP and general-purpose IO expansion interface, etc. | Dimensions: 210mm×150mm; Supports DC12V (compatible with DC5V) power input; Supports DDR2 data storage; Supports 10/100/1000Mb/s Ethernet MAC; 2 SFP optical fiber communication interfaces; 2 SATA interfaces; 1 RS232 interface; 1 RS485 interface; Supports FPGA general-purpose IO (1.8V, 2.5V, 3.3V and other level standards) expansion interface; Supports PROM dynamic refresh to configure FPGA |
| BQR5VSX95T Data Acquisition Multi-Function Verification Board | — | The verification board takes BQR5VSX95T as the core, equipped with dynamic refresh device (BM501-003CBRH), supporting dynamic refresh to configure FPGA. It is equipped with AD, DA, 1553B, CAN bus and other interfaces. | Dimensions: 315mm×187mm; Supports dynamic refresh system; Supports dual-channel, 12-bit, 105M intermediate frequency sampling AD (AD10200); Supports 12-bit DA (B9762); Supports 10/100/1000Mb/s Ethernet MAC data transmission; Supports 1553B bus interface; Supports CAN bus interface; Supports optical fiber transmission; Supports RS232; Supports FMC expansion interface for convenient user expansion |
| BMTI System Verification Board A | — | The verification board is mainly composed of BQR5V (BQR5VSX95T) series devices, dynamic refresh device (BM501-003CBRH) and AD/DA (B12D1000RH/B9739RB) devices. It supports dynamic refresh to configure FPGA, 2 pieces of 14-bit dual-channel A/D conversion, 2 pieces of 14-bit D/A conversion, 2 pieces of DDR2 data storage, and 10/100/1000Mb/s Ethernet MAC data transmission. | Dimensions: 280mm×170mm; Supports dynamic refresh system (BM501-003CBRH); Compatible with 3 pieces of B17V16 and 2 pieces of XCF32 configuration; Single D/A converter supports 2GSPS D/A conversion; A/D conversion single-channel sampling rate: 1.6GSPS; Provides single-ended 50MHz, differential 200MHz and external SMA clock input; Supports 10/100/1000Mb/s Ethernet MAC data transmission; Provides RS422 serial port; Provides FPGA user GPIO; +12V voltage input |
| BMTI System Verification Board B | — | The verification board is mainly composed of BQR5V (BQR5VSX95T) series devices, dynamic refresh device (BM501-003CBRH) and AD/DA (B12D1600RH/B9122RH) devices. It supports dynamic refresh to configure FPGA, 2 pieces of 14-bit dual-channel A/D conversion, 2 pieces of 16-bit D/A conversion, 2 pieces of DDR2 data storage, and 10/100/1000Mb/s Ethernet MAC data transmission. | Dimensions: 310mm×187mm; Supports dynamic refresh system (BM501-003CBRH); Compatible with 2 pieces of XCF32 to configure FPGA; Single D/A converter supports 1.2GSPS D/A conversion and dual-chip synchronization mode; A/D conversion single-channel sampling rate: 1.6GSPS, supporting dual-chip synchronization mode; Provides single-ended 50MHz, differential 200MHz and external SMA clock input; 2 pieces of DDR2 chips (MT47H128M16RT-25E), single-chip capacity: 2Gb; Supports 10/100/1000Mb/s Ethernet MAC data transmission; Provides RS422 serial port; Provides FPGA user GPIO; +12V voltage input |
| *BQ7K Series FPGA Application Development Board | — | The BQ7K series FPGA application development board is a hardware development platform designed for BQ7K series FPGAs. The development board mainly includes power supply system, BQ7K series FPGA, configuration system, DDR3 memory interface, SFP optical fiber communication interface, Ethernet MAC, PCIe 2.0 interface, FMC expansion IO interface, RS232 interface, RS485 interface, HPIO/HRIO single-ended/differential interface, GTX interface, etc. | Supports DC12V power input; Supports DDR3 data storage; 2 SFP optical fiber communication interfaces; Supports 10/100/1000Mb/s Ethernet MAC; Expands IO through FPGA mezzanine card (FMC) interface; 1 RS232 interface; 1 RS485 interface; High-performance single-ended/differential HPIO and wide-range HRIO led out through SMA RF interface; Supports FPGA general-purpose IO (1.5V/1.8V/2.5V/3.3V and other level standards) expansion interface |
| BQ7V Series FPGA Application Development Board | — | The BQ7V series FPGA application development board is a hardware development platform designed for BQ7V series FPGAs. The development board mainly includes power supply system, BQ7V series FPGA, configuration system, DDR3 memory interface, SFP optical fiber communication interface, FMC expansion IO interface, HPIO/HRIO single-ended/differential interface, GTH interface, etc. | Supports DC12V power input; Supports DDR3 data storage; 2 SFP optical fiber communication interfaces; Expands IO through FPGA mezzanine card (FMC) interface; High-performance single-ended/differential HPIO and wide-range HRIO led out through SMA RF interface; Supports FPGA general-purpose IO (1.5V/1.8V/2.5V/3.3V and other level standards) expansion interface |
| Xilinx Virtex-7 690T General Development Board | MM2006 | The Xilinx Virtex-7 690T general development board MM2006 is a hardware platform designed for the application and IO interface test of 7VX690T-1 FF1761. The test board supports PMBus system power supply, programmable power supply four-wire mode power supply, JTAG online debugging, differential and single-ended IO port test, and the voltage rail of each Bank of FPGA can be set according to the power supply requirements of external interface circuit. | Supports PMBus system power supply and programmable power supply four-wire mode power supply, which can control the power-on sequence of each power rail of FPGA; Leads out 3 HP Banks, including general-purpose IO, 4 pairs of MRCC, 4 pairs of SRCC, 3 pairs of DCI and 3 pairs of AC-coupled verified LVDS differential signals; Leads out 1 HR Bank, including 7 pairs of general-purpose IO, 2 pairs of MRCC, 1 pair of SRCC, 3 pairs of DCI and 3 pairs of AC-coupled verified LVDS_25 differential signals; Supports JTAG online programming mode through jumper configuration; Provides 200MHz global clock and supports external clock input |
| GPS/BD2 Dual-Mode Receiver Module (Thumb-Sized Module) | BMOT2-200 | Highly integrates RF front-end, baseband processing and positioning software. It features low power consumption, small size, high reliability and high performance, and can realize flexible positioning modes of GPS/BD-2 single-mode and dual-mode. | Positioning accuracy: Horizontal accuracy <5m, vertical accuracy <10m; Speed accuracy: Horizontal accuracy <0.05m/s, vertical accuracy <0.1m/s; Sensitivity: Acquisition sensitivity <-145dBmW, tracking sensitivity <-156dBmW |
| Product Name | Product Model | Function Description | Main Technical Specifications |
|---|---|---|---|
| Missile-borne Computer Controller | — | A 100% domestically-developed control unit with a high-performance 32-bit SPARC V8 microprocessor as the core. It features data acquisition & processing, communication, and signal control functions. The product consists of data acquisition and processing components, secondary power supply components, cable assemblies, T-type shock absorbers, etc. It is applicable to various missile-borne processing, control, and decision-making computers, and has been successfully integrated into multiple weapon models. | 100% domestically-developed design; High-performance 32-bit SPARC V8 processor; 32/64-bit floating-point unit compatible with IEEE754; Integrated 4MByte FLASH and 2MByte SRAM; 6-channel isolated RS422 bus; 1-channel 1553B bus (supports BC/RT functions); 64-channel general-purpose GPIO; 16-channel optically isolated IO inputs; High-reliability isolated input/output interfaces; Single-unit shock absorption design. |
| Radar Countermeasure/SDR/Data Link Series Digital Processor | — | A product with V7 series 690T FPGA + K7 series 325T FPGA as the core controller and FT6678 DSP as the core processor. It supports 5GSPS direct sampling, output, and high-precision synchronization of dual-channel analog signals with a bandwidth of 30MHz-2GHz. It is suitable for high-speed signal processing devices such as various missile-borne radars, seekers, and guidance systems, and has been successfully integrated into multiple models. | 100% domestically-developed design; Sampling rate: 1GSPS～5GSPS; Bandwidth: Dual-channel (I, Q) 0～2GHz analog signal input; Synchronization accuracy: Dual-channel (I, Q) transceiver synchronization accuracy ≤50ps within full bandwidth; Output power: Dual-channel (I, Q) output difference ≤1dBm within full bandwidth; System-level phase-change temperature-controlled heat dissipation design. |
| Attitude Controller | — | A 100% domestically-developed single unit with a high-performance SPARC V8 microprocessor SOC as the core control chip. It realizes attitude control of flight control devices in cooperation with inertial components, various sensors, and battery power supplies. It is applicable to attitude control of various miniaturized flight control devices based on inertial navigation, and has been successfully integrated into multiple models. | 100% domestically-developed design; High-performance 32-bit SPARC V8 processor; +28V voltage isolated input; 1-channel 1553B bus (supports BC/RT functions); 2-channel RS422 bus; 3-channel pyrotechnic ignition control; 6-channel solenoid valve control; Adaptable to harsh environments with high overload impact, high humidity and high salt. |
| Missile-borne Fuze Control Electronic System | — | Adopts a hardware architecture of FPGA combined with high-speed AD. It realizes key signal processing functions such as high-speed and high-precision acquisition of two-channel echo pulse signals, receiving safety arming release signals, forwarding electrical separation signals, and outputting self-destruction signals. It is applicable to signal processing of various missile fuze devices, and has been successfully integrated into a certain model. | 100% domestically-developed design; K7 FPGA + high-speed A/D architecture; +5V voltage input; Ultra-lightweight process structure design; 32M FLASH memory; 3-channel RS422 interface; 10-channel LVDS interface; 1-channel USB interface; Adaptable to complex environmental requirements of missile-borne products. |
| Missile/Rocket-borne Inertial Navigation System Computer Signal Processor | — | Adopts a domestic high-performance SPARC V8 microprocessor as the main control CPU. It provides multi-channel signal acquisition functions, supports general interfaces such as 1553B, RS-422, and RS-232, and has data acquisition, calculation, and transmission functions. It has been successfully integrated into multiple models. | 100% domestically-developed design; On-board 2MB SRAM and 4MB FLASH; Provides 1553B interface, optically isolated RS422 interface, and universal asynchronous serial interface; Designed with external data input acquisition and discrete IO functions; Radiation-resistant design optional; Power consumption <7.5W. |
| Visible Light & Infrared Digital Processing System | — | Adopts a hardware architecture of FPGA combined with two multi-core DSPs to implement the signal processing system. FPGA is mainly responsible for data preprocessing, scheduling of the DSP array, high-speed data transmission with DSPs, and external communication via RS422 signals. DSPs are mainly responsible for implementing complex data processing algorithms. Finally, a data processing system with standard scalable communication interfaces, high-speed data processing, and data transmission functions is realized. The product is mainly applied to various miniaturized flight control devices based on infrared recognition. | 100% domestically-developed design; K7 FPGA + DSP architecture; Operating frequency: 650MHz (FPGA), 1GHz (DSP); Maximum data access rate up to 1600MHz; Large-capacity storage space including 5 DDR3 chips and 2 FLASH chips; Adaptable to harsh environments with high overload impact, high humidity and high salt. |
| Reconfigurable Control Computer | — | Adopts an ARM+FPGA architecture, integrating a dual-core ARM Cortex-A9 processor system on the PS side and high-performance Kintex-7 FPGA programmable logic units. The ARM Cortex-A9 core adopts NEON technology with a floating-point SIMD engine, supports 32-bit floating-point operations, and can be externally connected to DDR3 memory chips and QSPI NOR FLASH program memory. | C7Z045 high-performance SoC processor; 12V voltage input; Integrates a feature-rich multi-core ARM processor system (PS) and high-performance FPGA programmable logic (PL); Floating-point computing capability up to 10GFlops; Supports communication interfaces such as CAN-FD, RS485, and USB; Supports 10/100/1000 Mbps Ethernet. |
| Intelligent Reconfigurable Radar Signal Processor | — | Integrates a quad-core ARM Cortex-A53 application processor, dual-core Cortex-R5 real-time processor, Mali-400 MP2 graphics processing unit, and 16nm FinFET+ programmable logic. The PS side has a main frequency up to 1.5GHz, and the single-core computing capability reaches 2.3DMIPS/MHz. The platform can deploy the Vitis AI integrated development kit, supporting mainstream AI frameworks and the latest models (such as CNN, RNN, and NLP), to fully meet the AI needs of edge and data centers, and quickly launch designs for embedded vision applications such as monitoring, machine vision, augmented reality, UAVs, and medical imaging. | CZU7EV MPSoC heterogeneous processor; 12V voltage input; DDR4 SODIMM (72-bit connected to the processor subsystem); DDR4 Component (64-bit connected to the programmable logic); Supports extended RF design in millimeter wave, multi-band, and digital fields; Supports embedded operating systems such as FreeRTOS, RT-Thread, and Linux. |
| Thermal Imager Signal Processing Board | MM1811 | Used to detect detector status, provide detector driving timing and power-on signals; Receive differential analog signals from the detector, drive and amplify the signals, and convert them into digital signals via AD; After signal processing, output CameraLink digital infrared images and PAL video digital timing for system use. It realizes the localized replacement of the core processing circuit for infrared imaging. It can be extended to other image sensor signal acquisition and processing fields, as well as high-speed signal processing fields such as radar signals. | The adopted FPGA integrates arithmetic modules such as multipliers and memory; Analog video: PAL; Industrial standard CameraLink output; Operating voltage: Customizable by customers; D-type standard interface, RS422 data interface; Operating temperature range: -45℃～+70℃; Dimensions: Customizable by customers. |
| Missile Electronic Life Cycle Recorder | BMMM03-00 | Suitable for various missile models, installed inside the missile body. It is used to record the management and maintenance information of missiles throughout the entire life cycle from production, delivery, use and maintenance to decommissioning and scrapping, realizing the full life cycle management of missiles. | Built-in lithium battery supporting automatic switching between internal and external power supplies; Battery life ≥2 years with low power alarm function; 4Mbit FLASH memory for real-time data recording (automatic overwrite when full, data retention after power failure); Supports full-duplex serial communication with a maximum rate of 115200bps. |