| Device Type |
Radiation-tolerant FPGA (equivalent to 41,000,000 system gates) |
| CLB Array Resources |
Contains 406,720 logic cells (LC) |
| Maximum Available I/O Ports |
500 ports; supports multiple single-ended and differential protocols under multi-voltage conditions; maximum data transfer rate up to 1.25 Gb/s |
| DSP Modules |
1,540 DSP modules; each module includes computing logic such as a 25-bit × 18-bit multiplier and a 48-bit adder |
| Block RAM (BRAM) |
795 blocks of 36 Kbit BRAM; supports FIFO, ECC and other functions |
| Clock Management Units (CMT) |
10 CMTs; each unit consists of 1 MMCM and 1 PLL |
| Serial Transceivers |
16 GTX serial transceivers; support a transmission rate of up to 10.3125 Gb/s |
| Integrated Interfaces |
1 integrated PCIe 2.1 module |
| Anti-single-event Effect Measures |
Provides independently developed triple modular redundancy (TMR) tools to mitigate single-event effects |
